809 lines
28 KiB
Python
809 lines
28 KiB
Python
import re, textwrap, os
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from os import sys, path
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from distutils.errors import DistutilsError
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is_standalone = __name__ == '__main__' and __package__ is None
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if is_standalone:
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import unittest, contextlib, tempfile, shutil
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sys.path.append(path.abspath(path.join(path.dirname(__file__), "..")))
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from ccompiler_opt import CCompilerOpt
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# from numpy/testing/_private/utils.py
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@contextlib.contextmanager
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def tempdir(*args, **kwargs):
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tmpdir = tempfile.mkdtemp(*args, **kwargs)
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try:
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yield tmpdir
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finally:
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shutil.rmtree(tmpdir)
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def assert_(expr, msg=''):
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if not expr:
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raise AssertionError(msg)
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else:
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from numpy.distutils.ccompiler_opt import CCompilerOpt
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from numpy.testing import assert_, tempdir
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# architectures and compilers to test
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arch_compilers = dict(
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x86 = ("gcc", "clang", "icc", "iccw", "msvc"),
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x64 = ("gcc", "clang", "icc", "iccw", "msvc"),
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ppc64 = ("gcc", "clang"),
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ppc64le = ("gcc", "clang"),
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armhf = ("gcc", "clang"),
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aarch64 = ("gcc", "clang"),
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s390x = ("gcc", "clang"),
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noarch = ("gcc",)
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)
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class FakeCCompilerOpt(CCompilerOpt):
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fake_info = ""
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def __init__(self, trap_files="", trap_flags="", *args, **kwargs):
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self.fake_trap_files = trap_files
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self.fake_trap_flags = trap_flags
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CCompilerOpt.__init__(self, None, **kwargs)
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def __repr__(self):
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return textwrap.dedent("""\
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<<<<
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march : {}
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compiler : {}
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----------------
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{}
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>>>>
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""").format(self.cc_march, self.cc_name, self.report())
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def dist_compile(self, sources, flags, **kwargs):
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assert(isinstance(sources, list))
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assert(isinstance(flags, list))
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if self.fake_trap_files:
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for src in sources:
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if re.match(self.fake_trap_files, src):
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self.dist_error("source is trapped by a fake interface")
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if self.fake_trap_flags:
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for f in flags:
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if re.match(self.fake_trap_flags, f):
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self.dist_error("flag is trapped by a fake interface")
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# fake objects
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return zip(sources, [' '.join(flags)] * len(sources))
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def dist_info(self):
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return FakeCCompilerOpt.fake_info
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@staticmethod
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def dist_log(*args, stderr=False):
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pass
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class _Test_CCompilerOpt:
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arch = None # x86_64
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cc = None # gcc
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def setup_class(self):
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FakeCCompilerOpt.conf_nocache = True
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self._opt = None
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def nopt(self, *args, **kwargs):
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FakeCCompilerOpt.fake_info = (self.arch, self.cc, "")
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return FakeCCompilerOpt(*args, **kwargs)
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def opt(self):
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if not self._opt:
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self._opt = self.nopt()
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return self._opt
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def march(self):
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return self.opt().cc_march
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def cc_name(self):
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return self.opt().cc_name
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def get_targets(self, targets, groups, **kwargs):
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FakeCCompilerOpt.conf_target_groups = groups
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opt = self.nopt(
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cpu_baseline=kwargs.get("baseline", "min"),
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cpu_dispatch=kwargs.get("dispatch", "max"),
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trap_files=kwargs.get("trap_files", ""),
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trap_flags=kwargs.get("trap_flags", "")
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)
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with tempdir() as tmpdir:
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file = os.path.join(tmpdir, "test_targets.c")
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with open(file, 'w') as f:
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f.write(targets)
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gtargets = []
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gflags = {}
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fake_objects = opt.try_dispatch([file])
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for source, flags in fake_objects:
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gtar = path.basename(source).split('.')[1:-1]
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glen = len(gtar)
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if glen == 0:
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gtar = "baseline"
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elif glen == 1:
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gtar = gtar[0].upper()
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else:
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# converting multi-target into parentheses str format to be equivalent
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# to the configuration statements syntax.
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gtar = ('('+' '.join(gtar)+')').upper()
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gtargets.append(gtar)
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gflags[gtar] = flags
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has_baseline, targets = opt.sources_status[file]
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targets = targets + ["baseline"] if has_baseline else targets
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# convert tuple that represent multi-target into parentheses str format
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targets = [
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'('+' '.join(tar)+')' if isinstance(tar, tuple) else tar
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for tar in targets
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]
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if len(targets) != len(gtargets) or not all(t in gtargets for t in targets):
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raise AssertionError(
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"'sources_status' returns different targets than the compiled targets\n"
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"%s != %s" % (targets, gtargets)
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)
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# return targets from 'sources_status' since the order is matters
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return targets, gflags
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def arg_regex(self, **kwargs):
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map2origin = dict(
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x64 = "x86",
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ppc64le = "ppc64",
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aarch64 = "armhf",
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clang = "gcc",
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)
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march = self.march(); cc_name = self.cc_name()
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map_march = map2origin.get(march, march)
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map_cc = map2origin.get(cc_name, cc_name)
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for key in (
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march, cc_name, map_march, map_cc,
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march + '_' + cc_name,
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map_march + '_' + cc_name,
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march + '_' + map_cc,
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map_march + '_' + map_cc,
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) :
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regex = kwargs.pop(key, None)
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if regex is not None:
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break
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if regex:
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if isinstance(regex, dict):
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for k, v in regex.items():
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if v[-1:] not in ')}$?\\.+*':
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regex[k] = v + '$'
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else:
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assert(isinstance(regex, str))
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if regex[-1:] not in ')}$?\\.+*':
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regex += '$'
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return regex
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def expect(self, dispatch, baseline="", **kwargs):
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match = self.arg_regex(**kwargs)
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if match is None:
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return
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opt = self.nopt(
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cpu_baseline=baseline, cpu_dispatch=dispatch,
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trap_files=kwargs.get("trap_files", ""),
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trap_flags=kwargs.get("trap_flags", "")
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)
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features = ' '.join(opt.cpu_dispatch_names())
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if not match:
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if len(features) != 0:
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raise AssertionError(
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'expected empty features, not "%s"' % features
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)
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return
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if not re.match(match, features, re.IGNORECASE):
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raise AssertionError(
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'dispatch features "%s" not match "%s"' % (features, match)
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)
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def expect_baseline(self, baseline, dispatch="", **kwargs):
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match = self.arg_regex(**kwargs)
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if match is None:
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return
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opt = self.nopt(
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cpu_baseline=baseline, cpu_dispatch=dispatch,
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trap_files=kwargs.get("trap_files", ""),
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trap_flags=kwargs.get("trap_flags", "")
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)
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features = ' '.join(opt.cpu_baseline_names())
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if not match:
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if len(features) != 0:
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raise AssertionError(
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'expected empty features, not "%s"' % features
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)
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return
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if not re.match(match, features, re.IGNORECASE):
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raise AssertionError(
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'baseline features "%s" not match "%s"' % (features, match)
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)
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def expect_flags(self, baseline, dispatch="", **kwargs):
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match = self.arg_regex(**kwargs)
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if match is None:
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return
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opt = self.nopt(
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cpu_baseline=baseline, cpu_dispatch=dispatch,
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trap_files=kwargs.get("trap_files", ""),
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trap_flags=kwargs.get("trap_flags", "")
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)
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flags = ' '.join(opt.cpu_baseline_flags())
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if not match:
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if len(flags) != 0:
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raise AssertionError(
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'expected empty flags not "%s"' % flags
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)
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return
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if not re.match(match, flags):
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raise AssertionError(
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'flags "%s" not match "%s"' % (flags, match)
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)
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def expect_targets(self, targets, groups={}, **kwargs):
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match = self.arg_regex(**kwargs)
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if match is None:
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return
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targets, _ = self.get_targets(targets=targets, groups=groups, **kwargs)
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targets = ' '.join(targets)
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if not match:
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if len(targets) != 0:
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raise AssertionError(
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'expected empty targets, not "%s"' % targets
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)
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return
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if not re.match(match, targets, re.IGNORECASE):
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raise AssertionError(
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'targets "%s" not match "%s"' % (targets, match)
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)
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def expect_target_flags(self, targets, groups={}, **kwargs):
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match_dict = self.arg_regex(**kwargs)
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if match_dict is None:
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return
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assert(isinstance(match_dict, dict))
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_, tar_flags = self.get_targets(targets=targets, groups=groups)
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for match_tar, match_flags in match_dict.items():
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if match_tar not in tar_flags:
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raise AssertionError(
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'expected to find target "%s"' % match_tar
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)
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flags = tar_flags[match_tar]
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if not match_flags:
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if len(flags) != 0:
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raise AssertionError(
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'expected to find empty flags in target "%s"' % match_tar
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)
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if not re.match(match_flags, flags):
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raise AssertionError(
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'"%s" flags "%s" not match "%s"' % (match_tar, flags, match_flags)
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)
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def test_interface(self):
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wrong_arch = "ppc64" if self.arch != "ppc64" else "x86"
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wrong_cc = "clang" if self.cc != "clang" else "icc"
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opt = self.opt()
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assert_(getattr(opt, "cc_on_" + self.arch))
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assert_(not getattr(opt, "cc_on_" + wrong_arch))
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assert_(getattr(opt, "cc_is_" + self.cc))
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assert_(not getattr(opt, "cc_is_" + wrong_cc))
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def test_args_empty(self):
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for baseline, dispatch in (
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("", "none"),
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(None, ""),
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("none +none", "none - none"),
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("none -max", "min - max"),
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("+vsx2 -VSX2", "vsx avx2 avx512f -max"),
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("max -vsx - avx + avx512f neon -MAX ",
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"min -min + max -max -vsx + avx2 -avx2 +NONE")
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) :
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opt = self.nopt(cpu_baseline=baseline, cpu_dispatch=dispatch)
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assert(len(opt.cpu_baseline_names()) == 0)
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assert(len(opt.cpu_dispatch_names()) == 0)
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def test_args_validation(self):
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if self.march() == "unknown":
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return
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# check sanity of argument's validation
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for baseline, dispatch in (
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("unkown_feature - max +min", "unknown max min"), # unknowing features
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("#avx2", "$vsx") # groups and polices aren't acceptable
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) :
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try:
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self.nopt(cpu_baseline=baseline, cpu_dispatch=dispatch)
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raise AssertionError("excepted an exception for invalid arguments")
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except DistutilsError:
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pass
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def test_skip(self):
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# only takes what platform supports and skip the others
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# without casing exceptions
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self.expect(
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"sse vsx neon",
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x86="sse", ppc64="vsx", armhf="neon", unknown=""
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)
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self.expect(
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"sse41 avx avx2 vsx2 vsx3 neon_vfpv4 asimd",
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x86 = "sse41 avx avx2",
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ppc64 = "vsx2 vsx3",
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armhf = "neon_vfpv4 asimd",
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unknown = ""
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)
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# any features in cpu_dispatch must be ignored if it's part of baseline
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self.expect(
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"sse neon vsx", baseline="sse neon vsx",
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x86="", ppc64="", armhf=""
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)
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self.expect(
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"avx2 vsx3 asimdhp", baseline="avx2 vsx3 asimdhp",
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x86="", ppc64="", armhf=""
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)
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def test_implies(self):
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# baseline combining implied features, so we count
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# on it instead of testing 'feature_implies()'' directly
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self.expect_baseline(
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"fma3 avx2 asimd vsx3",
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# .* between two spaces can validate features in between
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x86 = "sse .* sse41 .* fma3.*avx2",
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ppc64 = "vsx vsx2 vsx3",
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armhf = "neon neon_fp16 neon_vfpv4 asimd"
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)
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"""
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special cases
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"""
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# in icc and msvc, FMA3 and AVX2 can't be separated
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# both need to implies each other, same for avx512f & cd
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for f0, f1 in (
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("fma3", "avx2"),
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("avx512f", "avx512cd"),
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):
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diff = ".* sse42 .* %s .*%s$" % (f0, f1)
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self.expect_baseline(f0,
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x86_gcc=".* sse42 .* %s$" % f0,
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x86_icc=diff, x86_iccw=diff
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)
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self.expect_baseline(f1,
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x86_gcc=".* avx .* %s$" % f1,
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x86_icc=diff, x86_iccw=diff
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)
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# in msvc, following features can't be separated too
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for f in (("fma3", "avx2"), ("avx512f", "avx512cd", "avx512_skx")):
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for ff in f:
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self.expect_baseline(ff,
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x86_msvc=".*%s" % ' '.join(f)
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)
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# in ppc64le VSX and VSX2 can't be separated
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self.expect_baseline("vsx", ppc64le="vsx vsx2")
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# in aarch64 following features can't be separated
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for f in ("neon", "neon_fp16", "neon_vfpv4", "asimd"):
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self.expect_baseline(f, aarch64="neon neon_fp16 neon_vfpv4 asimd")
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def test_args_options(self):
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# max & native
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for o in ("max", "native"):
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if o == "native" and self.cc_name() == "msvc":
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continue
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self.expect(o,
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trap_files=".*cpu_(sse|vsx|neon|vx).c",
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x86="", ppc64="", armhf="", s390x=""
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)
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self.expect(o,
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trap_files=".*cpu_(sse3|vsx2|neon_vfpv4|vxe).c",
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x86="sse sse2", ppc64="vsx", armhf="neon neon_fp16",
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aarch64="", ppc64le="", s390x="vx"
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)
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self.expect(o,
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trap_files=".*cpu_(popcnt|vsx3).c",
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x86="sse .* sse41", ppc64="vsx vsx2",
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armhf="neon neon_fp16 .* asimd .*",
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s390x="vx vxe vxe2"
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)
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self.expect(o,
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x86_gcc=".* xop fma4 .* avx512f .* avx512_knl avx512_knm avx512_skx .*",
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# in icc, xop and fam4 aren't supported
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x86_icc=".* avx512f .* avx512_knl avx512_knm avx512_skx .*",
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x86_iccw=".* avx512f .* avx512_knl avx512_knm avx512_skx .*",
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# in msvc, avx512_knl avx512_knm aren't supported
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x86_msvc=".* xop fma4 .* avx512f .* avx512_skx .*",
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armhf=".* asimd asimdhp asimddp .*",
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ppc64="vsx vsx2 vsx3 vsx4.*",
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s390x="vx vxe vxe2.*"
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)
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# min
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self.expect("min",
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x86="sse sse2", x64="sse sse2 sse3",
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armhf="", aarch64="neon neon_fp16 .* asimd",
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ppc64="", ppc64le="vsx vsx2", s390x=""
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)
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self.expect(
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"min", trap_files=".*cpu_(sse2|vsx2).c",
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x86="", ppc64le=""
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)
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# an exception must triggered if native flag isn't supported
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# when option "native" is activated through the args
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try:
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self.expect("native",
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trap_flags=".*(-march=native|-xHost|/QxHost).*",
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x86=".*", ppc64=".*", armhf=".*", s390x=".*"
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)
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if self.march() != "unknown":
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raise AssertionError(
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"excepted an exception for %s" % self.march()
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)
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except DistutilsError:
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if self.march() == "unknown":
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raise AssertionError("excepted no exceptions")
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def test_flags(self):
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self.expect_flags(
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"sse sse2 vsx vsx2 neon neon_fp16 vx vxe",
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x86_gcc="-msse -msse2", x86_icc="-msse -msse2",
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x86_iccw="/arch:SSE2",
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x86_msvc="/arch:SSE2" if self.march() == "x86" else "",
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ppc64_gcc= "-mcpu=power8",
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ppc64_clang="-maltivec -mvsx -mpower8-vector",
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armhf_gcc="-mfpu=neon-fp16 -mfp16-format=ieee",
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aarch64="",
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s390x="-mzvector -march=arch12"
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)
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# testing normalize -march
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self.expect_flags(
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"asimd",
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aarch64="",
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armhf_gcc=r"-mfp16-format=ieee -mfpu=neon-fp-armv8 -march=armv8-a\+simd"
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)
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self.expect_flags(
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"asimdhp",
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aarch64_gcc=r"-march=armv8.2-a\+fp16",
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armhf_gcc=r"-mfp16-format=ieee -mfpu=neon-fp-armv8 -march=armv8.2-a\+fp16"
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)
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self.expect_flags(
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"asimddp", aarch64_gcc=r"-march=armv8.2-a\+dotprod"
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)
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self.expect_flags(
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# asimdfhm implies asimdhp
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"asimdfhm", aarch64_gcc=r"-march=armv8.2-a\+fp16\+fp16fml"
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)
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self.expect_flags(
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"asimddp asimdhp asimdfhm",
|
|
aarch64_gcc=r"-march=armv8.2-a\+dotprod\+fp16\+fp16fml"
|
|
)
|
|
self.expect_flags(
|
|
"vx vxe vxe2",
|
|
s390x=r"-mzvector -march=arch13"
|
|
)
|
|
|
|
def test_targets_exceptions(self):
|
|
for targets in (
|
|
"bla bla", "/*@targets",
|
|
"/*@targets */",
|
|
"/*@targets unknown */",
|
|
"/*@targets $unknown_policy avx2 */",
|
|
"/*@targets #unknown_group avx2 */",
|
|
"/*@targets $ */",
|
|
"/*@targets # vsx */",
|
|
"/*@targets #$ vsx */",
|
|
"/*@targets vsx avx2 ) */",
|
|
"/*@targets vsx avx2 (avx2 */",
|
|
"/*@targets vsx avx2 () */",
|
|
"/*@targets vsx avx2 ($autovec) */", # no features
|
|
"/*@targets vsx avx2 (xxx) */",
|
|
"/*@targets vsx avx2 (baseline) */",
|
|
) :
|
|
try:
|
|
self.expect_targets(
|
|
targets,
|
|
x86="", armhf="", ppc64="", s390x=""
|
|
)
|
|
if self.march() != "unknown":
|
|
raise AssertionError(
|
|
"excepted an exception for %s" % self.march()
|
|
)
|
|
except DistutilsError:
|
|
if self.march() == "unknown":
|
|
raise AssertionError("excepted no exceptions")
|
|
|
|
def test_targets_syntax(self):
|
|
for targets in (
|
|
"/*@targets $keep_baseline sse vsx neon vx*/",
|
|
"/*@targets,$keep_baseline,sse,vsx,neon vx*/",
|
|
"/*@targets*$keep_baseline*sse*vsx*neon*vx*/",
|
|
"""
|
|
/*
|
|
** @targets
|
|
** $keep_baseline, sse vsx,neon, vx
|
|
*/
|
|
""",
|
|
"""
|
|
/*
|
|
************@targets****************
|
|
** $keep_baseline, sse vsx, neon, vx
|
|
************************************
|
|
*/
|
|
""",
|
|
"""
|
|
/*
|
|
/////////////@targets/////////////////
|
|
//$keep_baseline//sse//vsx//neon//vx
|
|
/////////////////////////////////////
|
|
*/
|
|
""",
|
|
"""
|
|
/*
|
|
@targets
|
|
$keep_baseline
|
|
SSE VSX NEON VX*/
|
|
"""
|
|
) :
|
|
self.expect_targets(targets,
|
|
x86="sse", ppc64="vsx", armhf="neon", s390x="vx", unknown=""
|
|
)
|
|
|
|
def test_targets(self):
|
|
# test skipping baseline features
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
sse sse2 sse41 avx avx2 avx512f
|
|
vsx vsx2 vsx3 vsx4
|
|
neon neon_fp16 asimdhp asimddp
|
|
vx vxe vxe2
|
|
*/
|
|
""",
|
|
baseline="avx vsx2 asimd vx vxe",
|
|
x86="avx512f avx2", armhf="asimddp asimdhp", ppc64="vsx4 vsx3",
|
|
s390x="vxe2"
|
|
)
|
|
# test skipping non-dispatch features
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
sse41 avx avx2 avx512f
|
|
vsx2 vsx3 vsx4
|
|
asimd asimdhp asimddp
|
|
vx vxe vxe2
|
|
*/
|
|
""",
|
|
baseline="", dispatch="sse41 avx2 vsx2 asimd asimddp vxe2",
|
|
x86="avx2 sse41", armhf="asimddp asimd", ppc64="vsx2", s390x="vxe2"
|
|
)
|
|
# test skipping features that not supported
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
sse2 sse41 avx2 avx512f
|
|
vsx2 vsx3 vsx4
|
|
neon asimdhp asimddp
|
|
vx vxe vxe2
|
|
*/
|
|
""",
|
|
baseline="",
|
|
trap_files=".*(avx2|avx512f|vsx3|vsx4|asimddp|vxe2).c",
|
|
x86="sse41 sse2", ppc64="vsx2", armhf="asimdhp neon",
|
|
s390x="vxe vx"
|
|
)
|
|
# test skipping features that implies each other
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
sse sse2 avx fma3 avx2 avx512f avx512cd
|
|
vsx vsx2 vsx3
|
|
neon neon_vfpv4 neon_fp16 neon_fp16 asimd asimdhp
|
|
asimddp asimdfhm
|
|
*/
|
|
""",
|
|
baseline="",
|
|
x86_gcc="avx512cd avx512f avx2 fma3 avx sse2",
|
|
x86_msvc="avx512cd avx2 avx sse2",
|
|
x86_icc="avx512cd avx2 avx sse2",
|
|
x86_iccw="avx512cd avx2 avx sse2",
|
|
ppc64="vsx3 vsx2 vsx",
|
|
ppc64le="vsx3 vsx2",
|
|
armhf="asimdfhm asimddp asimdhp asimd neon_vfpv4 neon_fp16 neon",
|
|
aarch64="asimdfhm asimddp asimdhp asimd"
|
|
)
|
|
|
|
def test_targets_policies(self):
|
|
# 'keep_baseline', generate objects for baseline features
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
$keep_baseline
|
|
sse2 sse42 avx2 avx512f
|
|
vsx2 vsx3
|
|
neon neon_vfpv4 asimd asimddp
|
|
vx vxe vxe2
|
|
*/
|
|
""",
|
|
baseline="sse41 avx2 vsx2 asimd vsx3 vxe",
|
|
x86="avx512f avx2 sse42 sse2",
|
|
ppc64="vsx3 vsx2",
|
|
armhf="asimddp asimd neon_vfpv4 neon",
|
|
# neon, neon_vfpv4, asimd implies each other
|
|
aarch64="asimddp asimd",
|
|
s390x="vxe2 vxe vx"
|
|
)
|
|
# 'keep_sort', leave the sort as-is
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
$keep_baseline $keep_sort
|
|
avx512f sse42 avx2 sse2
|
|
vsx2 vsx3
|
|
asimd neon neon_vfpv4 asimddp
|
|
vxe vxe2
|
|
*/
|
|
""",
|
|
x86="avx512f sse42 avx2 sse2",
|
|
ppc64="vsx2 vsx3",
|
|
armhf="asimd neon neon_vfpv4 asimddp",
|
|
# neon, neon_vfpv4, asimd implies each other
|
|
aarch64="asimd asimddp",
|
|
s390x="vxe vxe2"
|
|
)
|
|
# 'autovec', skipping features that can't be
|
|
# vectorized by the compiler
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
$keep_baseline $keep_sort $autovec
|
|
avx512f avx2 sse42 sse41 sse2
|
|
vsx3 vsx2
|
|
asimddp asimd neon_vfpv4 neon
|
|
*/
|
|
""",
|
|
x86_gcc="avx512f avx2 sse42 sse41 sse2",
|
|
x86_icc="avx512f avx2 sse42 sse41 sse2",
|
|
x86_iccw="avx512f avx2 sse42 sse41 sse2",
|
|
x86_msvc="avx512f avx2 sse2"
|
|
if self.march() == 'x86' else "avx512f avx2",
|
|
ppc64="vsx3 vsx2",
|
|
armhf="asimddp asimd neon_vfpv4 neon",
|
|
# neon, neon_vfpv4, asimd implies each other
|
|
aarch64="asimddp asimd"
|
|
)
|
|
for policy in ("$maxopt", "$autovec"):
|
|
# 'maxopt' and autovec set the max acceptable optimization flags
|
|
self.expect_target_flags(
|
|
"/*@targets baseline %s */" % policy,
|
|
gcc={"baseline":".*-O3.*"}, icc={"baseline":".*-O3.*"},
|
|
iccw={"baseline":".*/O3.*"}, msvc={"baseline":".*/O2.*"},
|
|
unknown={"baseline":".*"}
|
|
)
|
|
|
|
# 'werror', force compilers to treat warnings as errors
|
|
self.expect_target_flags(
|
|
"/*@targets baseline $werror */",
|
|
gcc={"baseline":".*-Werror.*"}, icc={"baseline":".*-Werror.*"},
|
|
iccw={"baseline":".*/Werror.*"}, msvc={"baseline":".*/WX.*"},
|
|
unknown={"baseline":".*"}
|
|
)
|
|
|
|
def test_targets_groups(self):
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets $keep_baseline baseline #test_group */
|
|
""",
|
|
groups=dict(
|
|
test_group=("""
|
|
$keep_baseline
|
|
asimddp sse2 vsx2 avx2 vsx3
|
|
avx512f asimdhp
|
|
""")
|
|
),
|
|
x86="avx512f avx2 sse2 baseline",
|
|
ppc64="vsx3 vsx2 baseline",
|
|
armhf="asimddp asimdhp baseline"
|
|
)
|
|
# test skip duplicating and sorting
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
* sse42 avx avx512f
|
|
* #test_group_1
|
|
* vsx2
|
|
* #test_group_2
|
|
* asimddp asimdfhm
|
|
*/
|
|
""",
|
|
groups=dict(
|
|
test_group_1=("""
|
|
VSX2 vsx3 asimd avx2 SSE41
|
|
"""),
|
|
test_group_2=("""
|
|
vsx2 vsx3 asImd aVx2 sse41
|
|
""")
|
|
),
|
|
x86="avx512f avx2 avx sse42 sse41",
|
|
ppc64="vsx3 vsx2",
|
|
# vsx2 part of the default baseline of ppc64le, option ("min")
|
|
ppc64le="vsx3",
|
|
armhf="asimdfhm asimddp asimd",
|
|
# asimd part of the default baseline of aarch64, option ("min")
|
|
aarch64="asimdfhm asimddp"
|
|
)
|
|
|
|
def test_targets_multi(self):
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
(avx512_clx avx512_cnl) (asimdhp asimddp)
|
|
*/
|
|
""",
|
|
x86=r"\(avx512_clx avx512_cnl\)",
|
|
armhf=r"\(asimdhp asimddp\)",
|
|
)
|
|
# test skipping implied features and auto-sort
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets
|
|
f16c (sse41 avx sse42) (sse3 avx2 avx512f)
|
|
vsx2 (vsx vsx3 vsx2)
|
|
(neon neon_vfpv4 asimd asimdhp asimddp)
|
|
*/
|
|
""",
|
|
x86="avx512f f16c avx",
|
|
ppc64="vsx3 vsx2",
|
|
ppc64le="vsx3", # vsx2 part of baseline
|
|
armhf=r"\(asimdhp asimddp\)",
|
|
)
|
|
# test skipping implied features and keep sort
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets $keep_sort
|
|
(sse41 avx sse42) (sse3 avx2 avx512f)
|
|
(vsx vsx3 vsx2)
|
|
(asimddp neon neon_vfpv4 asimd asimdhp)
|
|
(vx vxe vxe2)
|
|
*/
|
|
""",
|
|
x86="avx avx512f",
|
|
ppc64="vsx3",
|
|
armhf=r"\(asimdhp asimddp\)",
|
|
s390x="vxe2"
|
|
)
|
|
# test compiler variety and avoiding duplicating
|
|
self.expect_targets(
|
|
"""
|
|
/*@targets $keep_sort
|
|
fma3 avx2 (fma3 avx2) (avx2 fma3) avx2 fma3
|
|
*/
|
|
""",
|
|
x86_gcc=r"fma3 avx2 \(fma3 avx2\)",
|
|
x86_icc="avx2", x86_iccw="avx2",
|
|
x86_msvc="avx2"
|
|
)
|
|
|
|
def new_test(arch, cc):
|
|
if is_standalone: return textwrap.dedent("""\
|
|
class TestCCompilerOpt_{class_name}(_Test_CCompilerOpt, unittest.TestCase):
|
|
arch = '{arch}'
|
|
cc = '{cc}'
|
|
def __init__(self, methodName="runTest"):
|
|
unittest.TestCase.__init__(self, methodName)
|
|
self.setup_class()
|
|
""").format(
|
|
class_name=arch + '_' + cc, arch=arch, cc=cc
|
|
)
|
|
return textwrap.dedent("""\
|
|
class TestCCompilerOpt_{class_name}(_Test_CCompilerOpt):
|
|
arch = '{arch}'
|
|
cc = '{cc}'
|
|
""").format(
|
|
class_name=arch + '_' + cc, arch=arch, cc=cc
|
|
)
|
|
"""
|
|
if 1 and is_standalone:
|
|
FakeCCompilerOpt.fake_info = "x86_icc"
|
|
cco = FakeCCompilerOpt(None, cpu_baseline="avx2")
|
|
print(' '.join(cco.cpu_baseline_names()))
|
|
print(cco.cpu_baseline_flags())
|
|
unittest.main()
|
|
sys.exit()
|
|
"""
|
|
for arch, compilers in arch_compilers.items():
|
|
for cc in compilers:
|
|
exec(new_test(arch, cc))
|
|
|
|
if is_standalone:
|
|
unittest.main()
|